IODelay is a crucial component in the I/O architecture of Xilinx FPGAs. Since the introduction of Spartan-6 and Virtex-5, this feature has been widely used. It becomes especially important when dealing with high-speed interfaces. In the latest Ultrascale series, the implementation of IODelay has evolved compared to the 7Series. This article provides an overview for your reference.
1. Usage of IODelay in 7Series FPGA
In the 7Series family, IODelay must be used in conjunction with IOdelayCtrl. The delay is divided into 64 taps, with each tap representing tREFCLK/64. REFCLK can be set to 200MHz, 300MHz, or 400MHz, resulting in different delay resolutions: 78ps, 52ps, and 39ps respectively. This level of precision makes it suitable for precise timing control in high-speed designs.
2. IODelay in Ultrascale FPGA
One of the key differences in Ultrascale is that the IODelayCtrl now compensates the entire delay line, rather than individual taps. This improves accuracy and simplifies configuration. Ultrascale introduces two user-selectable modes: TIME Mode and COUNT Mode.
In TIME Mode, the delay is temperature-compensated, ensuring more stable and accurate performance across varying operating conditions. In COUNT Mode, the delay per tap is fixed between 2.5ps and 15ps, and does not require the use of IODelayCtrl. However, TIME Mode is typically preferred due to its higher accuracy and reliability.
In TIME Mode, you can set a specific delay value during IP configuration, in picoseconds, ranging from 0 to 1250ps. The corresponding DELAY_TYPE attribute for this mode is "FIXED". If dynamic adjustment is needed, you can change the DELAY_TYPE to "VARIABLE" or "VAR_LOAD", then follow these steps:
- Deassert (set low) the EN_VTC pin.
- Wait for at least 10 clock cycles.
- Use the CE and INC ports to adjust the delay line up or down.
- Wait for at least 5 clock cycles.
- (Optional for multiple adjustments) Repeat step 3 if further changes are required.
- Wait for at least 10 clock cycles.
- Re-assert (set high) the EN_VTC pin.
This method allows for fine-grained, real-time control over the delay, making it ideal for applications where timing needs to adapt dynamically during operation.
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